Pavlin_33 Posted yesterday at 09:46 AM Posted yesterday at 09:46 AM I know this is a complex topic, but on one hand we have interpretation of the hardware saying one thing and on the other we have RL pilot statements, and RL Su-27 manual stating something different. Also it's worth mentioning that RL 29B manual never mentions this limitation - for what ever reason, but it seems to be in line with pilot statements. 4 i5-4690K CPU 3.50Ghz @ 4.10GHz; 32GB DDR3 1600MHz; GeForce GTX 1660 Super; LG IPS225@1920x1080; Samsung SSD 860 EVO 1TB; Windows 10 Pro
ED Team BIGNEWY Posted yesterday at 10:01 AM ED Team Posted yesterday at 10:01 AM yes it is a complex topic, the team have spent many hours on it during development and now with its release we have presented the evidence to you all in our previous post. We are happy to look at more technical evidence if people have any, but we can not take peoples opinions or recollections as fact there has to be supporting evidence. thank you 1 Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Pavlin_33 Posted yesterday at 11:58 AM Posted yesterday at 11:58 AM (edited) For all the people saying that SPO on a MiG-29 can pick up only "Hercues" launches, here you are: a testimony from a real Fulcrum pilot saying how his SPO device picked up enemy launch Rough translation: Quote My radar warning receiver went crazy. I heard the warning sound in my earpieces, and my RWR was flashing. This means that I got locked up by the enemy, that they had already fired at me and that I don't have much time to react in order to avoid the incoming missiles. --- Also here is the same pilot talking about how while having locked up an enemy at around 35km, he gets launch warnings on his SPO device. Rough translation: Quote I've climbed to 6000m and in a heading of 130-140 degrees I've spotted 3 hostiles on my radar. I have locked the closest one to me. [...] My target was at a distance of about 35km heading towards me. My next move was to flip the missile launch switch. This lasted a couple of seconds and the target already approached me at a distance of 30km. It was a this time that my SPO started blinking again and my radar lock broke. Edited 5 hours ago by Pavlin_33 fixed a typo 4 1 i5-4690K CPU 3.50Ghz @ 4.10GHz; 32GB DDR3 1600MHz; GeForce GTX 1660 Super; LG IPS225@1920x1080; Samsung SSD 860 EVO 1TB; Windows 10 Pro
Кош Posted yesterday at 11:59 AM Posted yesterday at 11:59 AM (edited) 11 часов назад, Muchocracker сказал: at is not what was claimed, the 40 millisecond figure is for the blocking system Blocking is essentially 2 alternately locked К134ЛР1 logic chips(you can choose what they should be based on connectors, here used as 2AND gate), signal from radar is just a logic pulse in whatever voltage, piggibacked in parralel on locking pin of these gate chips. Latency of K134ЛР1 is 0.66 microseconds. I know that on board CPU(BTsVM) works asynchronously. IE duty cycles of CPU and duty cycles of radar(aka radar PRF) are not synchronous. I know that computer receives data from radar, IO devices etc, and sets digital data rather as flags to be read asynchronously at own paces by whomever they concern. Or in other words, CPU does not work like "oh it's a radar pulse, now I have to send blocking pulse), rather "Hey devices, Radar PRF is 166512 HZ until furter notice". RWR blocking command is set in a register as a flag, I yet have to figure out how that is polled. If it's a high freq constant then ED is right. There are "Radar start emit", "Radar stop emit" and "Radar receiver block" digital signals but they are not sent or synced by CPU, rather CPU commands a separate device that sets frequency at which they should be. Edited yesterday at 12:08 PM by Кош 4 ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
Pavlin_33 Posted yesterday at 12:07 PM Posted yesterday at 12:07 PM Here's a testimony of yet another pilot saying how he picked up enemy launches: Rough translation: Quote I have experienced two times that I have entered their [enemy] radar beam and they have locked me up and launched at me missiles which I have managed to successfully evade by maneuvering. There is always a possibility to save your self, one is not merely a "clay pigeon". 3 i5-4690K CPU 3.50Ghz @ 4.10GHz; 32GB DDR3 1600MHz; GeForce GTX 1660 Super; LG IPS225@1920x1080; Samsung SSD 860 EVO 1TB; Windows 10 Pro
AeriaGloria Posted yesterday at 12:11 PM Posted yesterday at 12:11 PM (edited) 2 hours ago, Schmidtfire said: This is perhaps the solution to make everyone happy? X category up to 8 bars will still leave room to detect a hard lock and possibly launch (with modified boards) in the front hemisphere? Situational awareness in front hemisphere will be degraded while still allowing for that critical lock/launch warning to get through. For F-15/18, a radar signal stronger would be at about 25 km range. About 40 km for F-14. yes, it would make me happy. They also indicated they may make an option for the proposed modification to add launch warning, though I will admit I am getting very used to not having launch warning, and either looking out the window for missile launches or assuming so Also would like to mention something slightly off topic We were discussing my findings about F-14 showing P/X category and P/C during launch. After flying a lot online, I am getting X at long range and X/F at close range from F-14B, which is what both ED and manuals say should happen. I tested with someone online once and still got P/C signals. So I do not know if it is a radar mode thing. A few weeks ago I did report that F-14 135 early showed X and X/F on RWR in opposition to F-14B/A 135 late showing X-P/X-P/X/C. And it did receive a investigation tag Perhaps the last patch updated it, and we now properly get X-X/F from all F-14 variants. Edited yesterday at 12:16 PM by AeriaGloria Black Shark Den Squadron Member: We are open to new recruits, click here to check us out or apply to join! https://blacksharkden.com
Pavlin_33 Posted yesterday at 12:24 PM Posted yesterday at 12:24 PM Here is a testimony of yet another pilot (3rd) explaining how while having his radar is search mode he still could detect being locked up in his SPO: Rough translation: Quote Until then I was constantly being locked and breaking lock, maneuvering left and right. After a radar sweep I've picked up a target which was coming to me from my left side, above me, heading diagonally. Judging by its speed and altitude I've decided that this target is most advantageous, I've pressed the lock button and got a valid lock. There ya go, testimony from very people that operated the real thing in real combat conditions. An these are the export versions. 2 4 i5-4690K CPU 3.50Ghz @ 4.10GHz; 32GB DDR3 1600MHz; GeForce GTX 1660 Super; LG IPS225@1920x1080; Samsung SSD 860 EVO 1TB; Windows 10 Pro
ED Team BIGNEWY Posted 22 hours ago ED Team Posted 22 hours ago 15 hours ago, Кош said: Thank you! Now this is an adult level of conversation I was striving for. From the onset I have to say that wiring diagrams(I saw everything you have posted on my own before) per se don't tell us anything new and don't answer how blocking works, for that we need timing diagrams analisis - I have them but sadly it takes time and I'm a bit saturated with payware tasks at the moment. So far: RF binning is used not for spillover but for threat recognition. 40 should be microseconds because milliseconds doesn't make sense with any threat SPO-15 is known to identify. Also, what document cites this number? Is it cited as static or a result of a control law? Do you know that central computer's IO is refreshed at 2.5 megaherz, despite 100 kiloherz CPU? The 40 ms signal is blocking not blanking. Blanking pulses are way shorter. Specifically, it's the length of blocking period between bands during RF binning. This is used in order to give the circuits time to reset before starting analysis for the second band. And it absolutely is in milliseconds, it's not a "typographic error". Each sector check takes at least 0.08ms if it's empty, as the clock for sector commutator is 12.5 kHz, and longer if it's not empty as it needs to execute additional logic and measure the PRF. As for 2.5MHz, no, that's a reference clock not refresh rate. It's divided to lower frequencies to actually do things with it. The fastest thing BTsVM can do is register-register transcription at 800000 ops per second. I/O operations cannot take less than 3.6 μs each due to bus latency. Τhe maximum I/O rate over data bus is 200000 words per second. Even if it constantly flooded the data bus with off and on signals it would amount to max frequency of 100000 Hz, and attempting this would render the device unusable as it wouldn't be able to process other I/O over the bus. Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Kuky Posted 22 hours ago Posted 22 hours ago 4 hours ago, BIGNEWY said: We are happy to look at more technical evidence if people have any, but we can not take peoples opinions or recollections as fact there has to be supporting evidence. thank you Sorry but witnesses of real world events, such as pilots who flew the very aircraft, are not opinions. Those pilots are also SMEs on the subject as again, they flew the aircraft as a profession. Also documents can not only be written with mistakes but can also be interpreted incorrectly, which is most likely what happened in this case, esp when manuals from other sources do not back the info from the one ED used and relied on. PC specs: Windows 11 Home | Asus TUF Gaming B850-Plus WiFi | AMD Ryzen 7 9800X3D + LC 360 AIO | MSI RTX 5090 LC 360 AIO | 55" Samsung Odyssey Gen 2 | 64GB PC5-48000 DDR5 | 1TB M2 SSD for OS | 2TB M2 SSD for DCS | NZXT C1000 Gold ATX 3.1 1000W | TM Cougar Throttle, Floor Mounted MongoosT-50 Grip on TM Cougar board, MFG Crosswind, Track IR
ED Team BIGNEWY Posted 22 hours ago ED Team Posted 22 hours ago 3 minutes ago, Kuky said: Sorry but witnesses of real world events, such as pilots who flew the very aircraft, are not opinions. Those pilots are also SMEs on the subject as again, they flew the aircraft as a profession. Also documents can not only be written with mistakes but can also be interpreted incorrectly, which is most likely what happened in this case, esp when manuals from other sources do not back the info from the one ED used and relied on. SME's can also be wrong, pilots from years ago can also misremember situations. We have shown clear evidence of the workings of the SPO-15 modelled in DCS, the team have taken the to time to try and explain why we have modelled it this way. As mentioned we are happy to look at evidence, we need to see data that shows what some people are claiming, we have not seen that yet. 2 Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Кош Posted 22 hours ago Posted 22 hours ago 23 минуты назад, BIGNEWY сказал: The 40 ms signal is blocking not blanking. Are you talking about this? ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
Кош Posted 21 hours ago Posted 21 hours ago (edited) 38 минут назад, BIGNEWY сказал: The 40 ms signal is blocking not blanking. I know the difference between own binning and external blanking. 38 минут назад, BIGNEWY сказал: Even if it constantly flooded the data bus with off and on signals It doesn't because it doesn't need to. Like I said logic and hi frequency stuff are separate and asynchronous. PRF and CPU operations do not correlate. I am using logic descriptions and time diagrams, sources are N019-11, N019-38, N001-35M, N001-45 books. Edited 21 hours ago by Кош ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
ED Team BIGNEWY Posted 21 hours ago ED Team Posted 21 hours ago Yes, what is not shown in this doc is that there's an additional 40 ms pause between these pulses, the device allows several full searches in one band before switching to the other one, letting all circuits reset first. That's why it's not on by default, as it might cause it to miss search radars Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Кош Posted 21 hours ago Posted 21 hours ago (edited) 15 минут назад, BIGNEWY сказал: Yes, what is not shown in this doc is that there's an additional 40 ms pause between these pulses, the device allows several full searches in one band before switching to the other one, letting all circuits reset first. That's why it's not on by default, as it might cause it to miss search radars May you show me a fragment that describes this? Although looking at how it's assembled it should not matter at all regarding blanking from radar as it overrides any frequency. Still very strange to see such long timing with anything radar related, and thus, interesting. All processing timings in Russian SPO book is in microseconds. Regarding SPO blanking signal. Once again I need to make myself clear. Filling a register by CPU and polling that register by external devices IO are two different events. Blanking command is sent not when CPU fills the register. How second is done determines everything. Edited 21 hours ago by Кош ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
ED Team BIGNEWY Posted 21 hours ago ED Team Posted 21 hours ago 25 minutes ago, Кош said: May you show me a fragment that describes this? Although looking at how it's assembled it should not matter at all regarding blanking from radar as it overrides any frequency. Still very strange to see such long timing with anything radar related, and thus, interesting. All processing timings in Russian SPO book is in microseconds. Regarding SPO blanking signal. Once again I need to make myself clear. Filling a register by CPU and polling that register by external devices IO are two different events. Blanking command is sent not when CPU fills the register. How second is done determines everything. Hopefully this helps you The Cartridge #512 consists of the following systems: coupling system, blocking system, lock signal forming system, type lock signal forming system and test system. The coupling system contains compensation stages for each signal. Additionally, the "Pulse voltage" and "CW voltage" signals in the compensation stages are gated by the "Band I,II inhibit" signal, which is necessary to avoid generation of false information while switching between bands. For that reason the "Band I,II inhibit" pulse is sent to the blocking system. The length of this pulse is 40 ms. The blocking system formulates the "Blocking band I", "Blocking band II" and "Blocking forward hemisphere, rear hemisphere" signals based on incoming signals from the onboard equipment. The "Blocking FH, RH" signal based on "Band I, II inhibit" is necessary, so that the analysis of the signals is paused during transition processes while switching bands. In absence of signals necessary to control the band commutator of cartridge 53, the blocking system sends a "Enable band I, II" signal based on "Band I, II" command from block 6 (control panel). thank you Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Кош Posted 20 hours ago Posted 20 hours ago 14 минут назад, BIGNEWY сказал: Hopefully this helps you The Cartridge #512 consists of the following systems: coupling system, blocking system, lock signal forming system, type lock signal forming system and test system. The coupling system contains compensation stages for each signal. Additionally, the "Pulse voltage" and "CW voltage" signals in the compensation stages are gated by the "Band I,II inhibit" signal, which is necessary to avoid generation of false information while switching between bands. For that reason the "Band I,II inhibit" pulse is sent to the blocking system. The length of this pulse is 40 ms. The blocking system formulates the "Blocking band I", "Blocking band II" and "Blocking forward hemisphere, rear hemisphere" signals based on incoming signals from the onboard equipment. The "Blocking FH, RH" signal based on "Band I, II inhibit" is necessary, so that the analysis of the signals is paused during transition processes while switching bands. In absence of signals necessary to control the band commutator of cartridge 53, the blocking system sends a "Enable band I, II" signal based on "Band I, II" command from block 6 (control panel). thank you thanks. I know Polish to a degree if anything. ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
ED Team BIGNEWY Posted 20 hours ago ED Team Posted 20 hours ago 1 hour ago, Кош said: Regarding SPO blanking signal. Once again I need to make myself clear. Filling a register by CPU and polling that register by external devices IO are two different events. Blanking command is sent not when CPU fills the register. How second is done determines everything. Can you show me from your source / books that show where the IZD signal (or any other that can be used to synchronize with pulses) enters the signal flow? Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Кош Posted 20 hours ago Posted 20 hours ago (edited) 45 минут назад, BIGNEWY сказал: Can you show me from your source / books that show where the IZD signal (or any other that can be used to synchronize with pulses) enters the signal flow? that's the problem, IZP(start transmission), SBP(block transmission), SZP(blank radar receiver) - are not obviously connected to external IO commands. Orange is radar control, blue is IO Edited 19 hours ago by Кош 2 ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
ED Team BIGNEWY Posted 19 hours ago ED Team Posted 19 hours ago 2 minutes ago, Кош said: that's the problem, IZP(start transmission), SBP(block transmission), SZP(blank radar receiver) - are not obviously connected to external IO commands. we need to see evidence, without it you can not expect me to ask the team to investigate. They have already supplied lots of evidence as to why the SPO-15 functions as it does in DCS. It maybe just the case that what you are referencing has no documented evidence, or it does not apply to the unit we have modelled? 1 Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
Кош Posted 19 hours ago Posted 19 hours ago (edited) 17 минут назад, BIGNEWY сказал: we need to see evidence, without it you can not expect me to ask the team to investigate. They have already supplied lots of evidence as to why the SPO-15 functions as it does in DCS. It maybe just the case that what you are referencing has no documented evidence, or it does not apply to the unit we have modelled? As you see I'm trying to work with engineering evidence exclusively. Books I use are exactly from 9.12A Warsaw Pact model. I have found that signal to SPO is set by CPU but question is still when it's fired. That's what I'm investigating. Edited 19 hours ago by Кош 3 ППС АВТ 100 60 36 Ф < | > ! ПД К i5-10600k/32GB 3600/SSD NVME/4070ti/2560x1440'32/VPC T-50 VPC T-50CM3 throttle Saitek combat rudder
Thirsty Posted 17 hours ago Posted 17 hours ago 10 hours ago, Schmidtfire said: Situational awareness in front hemisphere will be degraded while still allowing for that critical lock/launch warning to get through. IF only that would happen, I think people wouldn't have such a big issue. Hopefully, since all you really need the SPO-15 for is not to get SA in a Air to Air battle, but to know if you get fired uppon (lock warning)
Harlikwin Posted 14 hours ago Posted 14 hours ago 9 hours ago, Кош said: Blocking is essentially 2 alternately locked К134ЛР1 logic chips(you can choose what they should be based on connectors, here used as 2AND gate), signal from radar is just a logic pulse in whatever voltage, piggibacked in parralel on locking pin of these gate chips. Latency of K134ЛР1 is 0.66 microseconds. I know that on board CPU(BTsVM) works asynchronously. IE duty cycles of CPU and duty cycles of radar(aka radar PRF) are not synchronous. I know that computer receives data from radar, IO devices etc, and sets digital data rather as flags to be read asynchronously at own paces by whomever they concern. Or in other words, CPU does not work like "oh it's a radar pulse, now I have to send blocking pulse), rather "Hey devices, Radar PRF is 166512 HZ until furter notice". RWR blocking command is set in a register as a flag, I yet have to figure out how that is polled. If it's a high freq constant then ED is right. There are "Radar start emit", "Radar stop emit" and "Radar receiver block" digital signals but they are not sent or synced by CPU, rather CPU commands a separate device that sets frequency at which they should be. Yeah this is how western analogs worked as well. I mean its fairly straighforward to generate the same PRF as the radar, or more likely its just pulled from the radar directly. RWR listens when the radar listens. New hotness: I7 9700k 4.8ghz, 32gb ddr4, 2080ti, :joystick: TM Warthog. TrackIR, HP Reverb (formermly CV1) Old-N-busted: i7 4720HQ ~3.5GHZ, +32GB DDR3 + Nvidia GTX980m (4GB VRAM) :joystick: TM Warthog. TrackIR, Rift CV1 (yes really).
Mainstay Posted 12 hours ago Posted 12 hours ago Jeez what is going on…. Just give us some extra options for the SPO15 so we can set it as legacy mode or something. Evidence of pilots is not enough, evidence of other documents is not enough but when the F-35 comes out all the the darkest secrets are implemented and that’s all fine… really ED what the hell. 5 2
Dejan Posted 11 hours ago Posted 11 hours ago 1 hour ago, Mainstay said: Jeez what is going on…. Just give us some extra options for the SPO15 so we can set it as legacy mode or something. Evidence of pilots is not enough, evidence of other documents is not enough but when the F-35 comes out all the the darkest secrets are implemented and that’s all fine… really ED what the hell. Bingo! When arrogance hits the head, reason loses all connection with logic and reality. 1
ED Team BIGNEWY Posted 4 hours ago ED Team Posted 4 hours ago 15 hours ago, Кош said: that's the problem, IZP(start transmission), SBP(block transmission), SZP(blank radar receiver) - are not obviously connected to external IO commands. Orange is radar control, blue is IO but where does -35-11 receive this signal from internally? it does not show and as far as we can tell it does not. If the claim is -35 can sync to them, it only has access to main loop sync (100 Hz) and to reference clock (2.5 MHz) none of which is of use on its own. Its worth investigating. thanks Forum rules - DCS Crashing? Try this first - Cleanup and Repair - Discord BIGNEWY#8703 - Youtube - Patch Status Windows 11, NVIDIA MSI RTX 3090, Intel® i9-10900K 3.70GHz, 5.30GHz Turbo, Corsair Hydro Series H150i Pro, 64GB DDR @3200, ASUS ROG Strix Z490-F Gaming, PIMAX Crystal
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